Investor Questions

Embedded Non-Volatile Memory (eNVM) refers to a type of non-volatile memory technology that is integrated and embedded directly into a chip for the purpose of storing data. Information stored in eNVM is retained even when power is turned off. Generally, it has higher performance and speed compared to non-embedded (external) memory, therefore, all chips has and require eNVM functions.

There are several types of eNVM, namely ROM, eFuse, OTP, MTP, embedded flash, and emerging memory (RRAM and MRAM). Among these, eMemory invents IPs and solutions for OTP, MTP, and emerging memory. eFuse and ROM (Read-Only Memory) are provided by foundries.

ROM must be programmed during the design phase and remains unchangeable after manufacturing. In contrast, eFuse programming occurs during the wafer test phase and cannot be altered post-packaging. eFuse presents additional drawbacks, including smaller data density and a larger area on the chip. Moreover, it lacks security, making it susceptible to reverse engineering through techniques like electron microscopes. OTP occupies a smaller area, is programmable even after packaging, and is more secure due to invisible storage at the transistor level.

Embedded flash also comes with its share of disadvantages. It is limited to mature process nodes and requires at least 10 additional mask layers, contributing to increased foundry costs. MTP does not need additional mask layers and can be used at advanced process nodes.

eMemory invents pure technology-based Intellectual Property (IP) at the transistor level. We invent IPs for non-volatile embedded memory, which means that the memory function is embedded on the chip and has at least 10-year data retention. Our OTP, a one time programmable device, guarantees the chip memorizes one-time and forever. For example, parameter setting, trimming, repair, code storage, UID, and more. Deriving from two OTP transistors, we also have hardware security-related IP solutions, namely PUF, which stands for physical unclonable function to serve as a hardware root of trust for chip security needs. In addition, we also invented embedded MTP (multiple times programmable) IPs, embedding multiple times programmable memory functions such as flash and EEPROM.

For more technical explanations of each product, please refer to our product pages: https://www.ememory.com.tw/en-US/Products

Our business model consists of 20-30% licensing revenue and 70-80% royalty revenue. The licensing revenue comprises technology licensing from foundries and design licensing from end customers. Design licensing is further divided into usage and NRE fees; the former for reusing our IPs from our IP library, the latter for customized designs. We place less emphasis on licensing to encourage customer adoption of our IPs but insist on collecting royalty because it is reoccurring and a fixed percentage of foundry wafer price. A royalty-based business will drive revenue as more customers adopt our IPs at more advanced nodes, resulting in higher ASP.

To grow our business, we aim to increase our penetration rate in foundries, currently at 20% for 8-inch and approximately 2% for 12-inch . By expanding into more advanced processes, we can charge higher royalties per wafer, increasing ASP.

We're also moving into DRAM and flash applications. For DRAM, we're developing repair functions, and for flash, we're adding security features.

Distruptive Innovation is also central to our growth. Our NeoPUF, offers chip fingerprints and perfect natural randomness. It's cost-effective, energy-efficient, high-speed, and compatible with global foundry processes. PUF is a key growth driver and opens doors to new applications and partnership opportunities, especially in hardware-based security.

We currently work with 25 foundries worldwide. The majority of our royalty revenue comes from TSMC and UMC, contributing around 50% and 20% respectively. The remaining 30% are made up of revenue contributions from other foundries such as SMIC, Vanguard, PSMC, GF, etc., who are all our foundry-based customers.

The majority of our revenue contribution comes from Taiwanese foundries. TSMC is our top foundry customer and almost 50% of our royalty revenues come from TSMC. Since we have a lot of tape out in TSMC pipeline waiting for production, it might increase to 60% for leading edge.

The foundry collects royalties from customers based on the pre-determined percentage rate of wafer price for each foundry, making it easier to audit our royalties. For example, we have over 900 chip customers in China alone, which is impossible to audit one-by-one . All our customers will pay us royalty because if customers don't, they will be breaching their contract. This will lead to high penalty and will affect other customer tape-outs in the pipeline.

Our current penetration rate for foundry 8-inch is 20%, providing a good indication of who is choosing us as a premium solution compared to foundry free eFuse. For 12-inch, our penetration rate is less than 2% because we spent many years proving and qualifying our technologies. However, taking TSMC as an example, over 90% of their revenue comes from 12-inch so it means there's still a lot of opportunities for us.

Our royalty rate is fixed and we receive a royalty report from foundry every quarter, based on process node. We calculate the penetration rate by dividing the royalty amount by the royalty rate (indicating the percentage of foundry revenue paid towards our royalties) then compare it according to the process’s revenue of the foundry’s previous quarter.

All of our biggest customers started off by adopting our technologies one-by-one. Our biggest customers include: Samsung, who first used our IP for ISP, then OLED, then now DDR5 and smart power; Apple, who started licensing our IPs for PMIC and now RF and other advanced process applications; Renesas who adopted our IP for ADAS and acquired Dialog, who was using our IP for PMIC in automotive; Novatek, who first adopted our IP for TDDI, then OLED, now moving on to 6nm SoC; Realtek who adopted our IPs for many products under 28nm, and Qualcomm and MTK. As these customers use more and more of our IPs and migrate to advanced nodes, we expect to see more tape-outs at higher ASPs.

Around 10-15% of our customers are from China, including 9 foundries and over 900 chip companies.

Customers typically adopt our IPs because they have no other alternatives. Whether it is due to better performance, security, higher densities, etc., customers switch to us because our solution is better than their own or better than other competitors.

Embedded provides better performance overall compared to external because it is more high-speed, low-power and secure. As processors are moving forward, all the accompanying technologies have to improve performance to catch up.

AI systems handle massive amounts of sensitive data and code, making heightened security essential. Our security solutions are crucial for protecting AI-related information and know-how, meeting the strict requirements of AI customers.

The growing demands of AI, such as larger training data and the need for high-speed computation, result in an increased use of CPUs. As more multi-core high-performance CPUs are employed, more High-Density Embedded SRAM are needed to cope with faster computing and larger training models. The rising SRAM memory density increases the likelihood of memory defects and therefore, the need for SRAM repair. Because of this, advanced process customers have recently adopted our IPs for SRAM repair.

We are currently working with IBM Research and a Chinese foundry for embedded MRAM, with contracts signed and ongoing. eMemory receives a design license fee and earns royalties once mass production begins. Moreover, MRAM relies on our OTP for repair function, which will also enhance yield.

In the case of ReRAM, our partners include Panasonic and UMC, and the business model is similar to that of MRAM.

To learn more about emergining memory technologies, please refer to: https://www.ememory.com.tw/en-US/Products/Specialty?guid=23072814323581

It takes a while for our technologies to take off because all of our technologies are original inventions and need to undergo an extensive process of patenting, passing foundry qualifications, and accumulating production records.

The first stage of commercializing a technology requires spending at least 1-2 years in the foundry qualification stage. Due to the risks associateds with embedded memory, we must prove that our technologies work. Once proven, we need to find early adopters, which take another few years before moving from tape-out to production. Once each technology has accumulated enough production record, larger companies will adopt our IPs, this process typically takes another few years.

Almost 30% of our expenses are for R&D. This has nothing to do with whether or not we have more licensing revenue because our R&D is sustained by the revenue from our previous technologies. This is how we maintain operating leverage. As each of our technologies successfully commercialize, we move our R&D into developing new technologies and new process platforms.

Our technologies are original inventions and all need to be patented, which do expire after 20 years. However, our agreement with foundries are perpetual and don't have an end date. As long as a chip is produced within the agreement's timeframe and utilizes our IPs, it must adhere to the agreement terms and pay the predetermined royalty rate.

To ensure continuous protection, we continually enhance and modify our technologies, creating different versions to renew patents. Notably, each technology is safeguarded by a comprehensive patent pool, encompassing cell patents, design patents, and more. That is why we have over 1500 patents as of now.

Take our NeoBit for example, it was invented 20 years ago and remains protected by current patents, still contributing to tape outs and generating royalties.

Our main risk is ourselves. We must ensure that all of our technologies work, which is why we dedicate our efforts into qualifying our technologies and accumulating production record.

Another potential risk is intellectual infringement. However, engaging in such practices will result in huge penalty so we have not faced any lawsuits during our 20+ years company history.

Our payout ratio is almost 100%. Yearly EPS vs. Dividends information here

The two technologies will not cannibalize each other since they serve two different purposes.

OTP is designed to permanently memorize information once and is used to store data that shouldn’t be changed, such as device ID, security codes, permanent settings, and more. Once programmed, the information is expected to remain constant throughout the device’s lifespan. For more information on OTP: (https://www.ememory.com.tw/en-US/Products/Specialty?guid=19080715024086)

MTP is designed to be programmed and erased multiple times, from a thousand to hundreds of thousands. MTP is used in applications that require frequent updates and modifications, such as complex PMIC, MCU or E-paper applications. For more information on MTP: (https://www.ememory.com.tw/en-US/Products/Specialty?guid=19080715025687)

Many chips require OTP for functions such as trimming and parameter setting. However, not all require MTP. We also have alternatives such as external flash memory and EEPROM. In addition, to enhance the functionality of integrated circuits (ICs), many customers do require embedded MTP. This enables repeated rewriting for additional information storage and code updates within the chip and meets low power consumption requirements.

The reason for the fast growing demand of our PUF-based security IPs is because: high security architecture can be simply implemented.

Security is now a required element to be connected to cloud services. As security becomes necessary for applications in edge and cloud devices, high- security solutions that can be easily implemented are preferred. Our PUF- based solutions provide integrated secure storage and secure Root of Trust, becoming a popular choice for security applications. In the past, creating a security system requires complicated cryptographic processing. With our perfect randomness PUF IPs, security functions can be implemented much easier and faster into chip functions without complicated crypto-processing, which typically increases chip size, sacrificing speed and power consumption.

In the past, when people seek security solutions, they have to look around and search for a couple of providers to provide 1) security storage, 2) Root of Trust, and 3) crypto engines. After they have IPs with all three components, they still need to figure out how to integrate all into a solution. To become to a security co-processor, SoC designers need to add firmware and API such that it can be easily embedded into SoC.

Our PUFcc integrates all three elements into one security solution and is able to provide firmware and API to facilitate the design of SoC. Since our solutions is built on our existing OTP process platforms, we are able to provide our solutions quickly as we currently have more than 600 OTP process platforms ready. No other security IP companies are able to do this.

The benefits for customers are: if customers adopt our solution for their product designs, we can help customers pass security certifications, without extra R&D and certification costs.

As this is still early stage, there is a big correlation between the PUF license fee and the tape-out time of the customer. At present, there are many customers in the pipeline, and most of them are first-time users of security IP, so it takes more time for customers to learn how to use it. We expect with incorporating our solution into Arm and other platforms, will accelerate the adoption rate and lead to much significant contribution in revenue.

Synopsys does not have PUF technology. Intrinsic ID has SRAM PUF on the market, but SRAM PUF is unstable due to the following:

• The values will change after power-on
• Variations in operating voltage or temperature will also change the value of SRAM storage Noise will also cause the value of SRAM to change
• Long-term use of SRAM is unreliable
• All of the issues mentioned above causes problems for chips when using SRAM PUF. Therefore, after the introduction of our PUF, we have become very popular because our PUF has excellent stability and reliability.
   

In the future, the requirements for system security will become more stringent to meet the Zero Trust specification, which means "Never Trust, Always Verify". PUF is the chip fingerprint, which is the best and necessary solution for Unique ID, because it is generated by taking advantage of the small differences in each chip process. No two chips will have the same ID.

Rambus only have algorithm-related solutions. If customers adopt Rambus’ solution, they will still lack a secure OTP or PUFrt to serve as the chip’s root-of-trust.

We still charge license fees and royalties. The joint activity is mainly for promotion, we do not need to pay the other party any fees or profit shares.

Our technology is a genetic invention and there are no government restrictions. The technology patent is for 20 years, but we improve the version periodically to extend the patent period. For example, NeoBit's patent was extended to 2034 in 2014. In addition, the complete IP, including circuit design, has 50 years of copyright protection, and the royalty payment contracts we license to foundries have no termination date.

Reliability is not the only consideration.

UID and Key ensure the chip's identity cannot be tampered with, copied or stolen, and the process of generating it needs to be strictly controlled. To use eFuse to for Key storage or UID, you must first write-in the key or obtain a random number from outside. The eFuse of each chip is empty at the beginning, and the data is written externally, which gives attackers opportunity to manipulate information. Using NeoPUF to generate Key or UID is from the chip's own PUF and cannot be written externally. The security of these two methods are different.

In addition to generating the UID and Key, which cannot be interfered with externally, our PUFrt and Secure OTP both contain physical, electrical anti-tampering designs (certified by Riscure), which can further prevent attacks.

We are not affected by the U.S. requirements and do not need to provide KYC information. Our customers are mainly from Europe, US and Japan.

Encryption uses crypto algorithms to protect sensitive information, including secure websites or even emails. The widely used public-key encryption system relies on algorithms difficult for even the fastest conventional computers to solve in limited time. However, quantum computers will threaten existing public-key encryption within a decade, The National Institute of Standards and Technology (NIST) is expected to announce new algorithms for encryption in 2024. The main problem with the potential post-quantum encryption algorithm is that the key size is very long, which may be thousands of times longer than current RSA and ECC keys.

Advanced AI models are typically stored in conventional commodity flash memory, and this standard storage device has no security function, so it can be stolen or modified. Our PUF-based hardware security Root of Trust IP (PUFrt) and Crypto Coprocessor (PUFcc) can encrypt and authenticate these AI models to protect them from being stolen or modified, which is why customers need PUFsecurity and eMemory solutions.

In addition, all processors have SRAM, one type of volatile memory, just like DRAM. When SRAM is manufactured, it will have bad bits that need OTP for memory repair. In the past, eFuse was used to do SRAM repair functions. However, the SRAM density in AI chips is much bigger, which eFuse cannot fulfil due to density limitations. Our OTP offers 500 to 1000 times bigger density than eFuse. Therefore, for AI with large-density/SRAM, our IP become a necessity. Based on SRAM repair and security requirements, most AI chips will convert from eFuse to our OTP.

Our cooperation with Arm has been ongoing. Some customers have already taped out our security solution through ARM's platform and contributed license fee already.

Caliptra is an open-source standard that aims to integrate security mechanisms into chips and plays a crucial role in the Open Compute Project (OCP) reference design. Its primary goal is to establish an open-source standard for the Hardware Root of Trust (HRoT), which is essential for hardware-based security functions embedded in CPUs, GPUs, SoCs, ASICs, Network Chips, SSDs, and more.

As far as we know, this is the first time TRNG, OTP and PUF are collectively addressed within a single standard, which happens to be our strengths and expertise. This also means the HRoT of the processor for data centers must include hard macros, TRNG, OTP, and PUF, as key components. However, since hard macros are unavailable through open source, they must be obtained through licensing from us.

While Caliptra is still in its early stages, we foresee broader adoption for hardware-based security in data centers in the future, which opens up significant opportunities for our PUF-based technologies.

We are working with them on Confidential Computing Architecture and Corstone Architecture, covering applications such as Smartphones, Automotive and IoT (edge computing). There are license contributions from Automotive and IoT customers already.

Arm's CPU application in PC belongs to their Client Business. Similarly, CPU in mobile also belongs to Client Business. Our PUFrt will be used in the Runtime Security Engines (RSE) of Arm's mobile CPU. Once verified, it may also be used in the CPU for PC.

Other than CPU partners, we have also licensed to DPU, AI, Edge Computing, HPC, IoT and ADAS customers.

Arm is the leading CPU IP company with more than 95% of the market share in mobile. The successful co-development of PUF-based Root of Trust security into their CPU has the following implications :

1. Our PUF-based security Root of Trust solution is the best in the market.
2. We can enter the mobile market with Arm, which currently holds over 95% of the market share.
3. We expect our market share in the Confidential Computing market will also be very big.

Recently, there was an incident in Taiwan involving some fraud company using eMemory's name to raise capital. This company defrauded individual investors by asking for a money transfer. We are formally answering this question and clarifying that we do not have any fundraising activities.

Since 2000, eMemory has relied on organic growth by inventing new technologies one after another. Since turning profitable in 2005, we have maintained a more than 90% dividend payout policy, which is different from most large international IP companies’ buy-growth strategies to increase their IP portfolios.

Our technology development strategies are all based on our core competence related to our existing technologies and platform. There is still considerable room for future growth, so we have not considered any mergers and acquisitions.

There are two categories in IP companies:

1. Pure design IP companies

These companies use existing transistors to design specific functional IPs, such as standard cell, SRAM, high speed IO, etc. They license to fabless companies directly and are companies like ARM, Synopsys, and M31 and RISC-V related.

2. Technology + Design IP companies

These companies have their own device technology developed at foundry and they license the technology to foundries, such as OTP, MTP, and Flash. They also use the device they invented to design IP for fabless companies. These companies are, for example, eMemory and SST. SST’s Flash cell is only on the embedded Flash process, while eMemory’s OTP cell covers all the processes. Therefore, OTP’s market size is much bigger than Flash.

The CHIPS Act subsidizes foundries that built fabs in the US. It is only applicable to those who build fabs with the money from the subsidies. Since we did not receive any subsidies, we’re not within the restricted scope.

As mentioned before, our IPs are our original invention, we have patent rights for our IPs in major regions of the world. We also did not receive any subsidies from these governments so we’re not restricted by any national government.

Our royalties are recognized in the quarter after foundry shipment.

So our October royalty already reflect the lower utilization rate in some small foundries. However, since our 12-inch penetration rate has just started to take off, the overall royalty growth and penetration rate will be contributed from 12-inch applications in major foundries. The decline in utilization from major foundries was mainly in 6/7nm. However, this is a very small percentage for us as customers are just starting production. We expect this will still grow next year. In addition, licensing from PUF-based will grow significantly next year so we remain confident in our long-term growth trend.  

Tape-outs vary significantly in terms of customer size, product application, and mass production scale, so it isn’t easy to use them directly to predict future revenue. However, with the increasing number of process platforms and technologies, there is a clear long-term growth trend for tape-outs and licensing revenue.

This year, we waive the technology licensing fee to foundry, especially for MTP-related technology, but increased production royalty. This will accelerate foundries’ progress of buildings platforms for our technologies which we expect to bring a higher royalty contribution in the future. We also expect increased growth in licensing revenue next year driven by PUF-based solutions. 

We have been licensing our IPs to foundries all over the world. The advantage of using our IP is that our customers can go to different locations for production. There is no such request from customers to decentralize our RD outside of Taiwan. But we did set up Japanese RD team for the reason to recruit talents.

Since our IP technologies are our own invention, we don't need any US or government approval so we can license it directly to anyone.

Although our main R&D is in Taiwan, our IP data is stored in the cloud server. Our patents are registered in all major regions of the world and protected by international regulations. As long as the company's technology is used, regardless of the chip company or foundry, they must pay the license fee and royalty, which is the greatest protection for the company's shareholders. Currently no customers have avoided our IPs due to concerns about war.

All patents are held by the company, and the inventor cannot use the patent if they leave.

We have no accounts receivable problems. Since the company was established, we have only had one small collection problem in the early days, and for most of our Chinese customers, we take prepayment.

This question mainly refers to the use of 12-inch fabs to produce 8-inch process like 0.18 or 0.11. This has been happening for a long time, especially in new fabs built in China.

This has no impact to us. We are promoting our NeoFlash technology to the foundries because NeoFlash does not require additional equipment compared to embedded flash (which requires purchasing additional equipment). Our strategy of waiving technology license and raising production royalty is very attractive to fab customers as they can add-value and increase wafer price by adopting our technology.

We have 9 foundries customers and over 900 chip customers in China, accounting for about 10-15% of our total revenue. There have been no problems with collecting royalties and other payments. This is related to the nature of IPs. ARM offers soft IP, providing customers RTL (similar to software for chip design). They collect licenses and royalties from chip companies. They must audit their customers if customers use the same RTL to other chips without being licensed.

We license the fundamental transistor to the foundries. The foundry pays royalties based on the royalty rate and wafer volume, while the chip companies pay design licensing fees only . Since there are only 9 foundries but more than 900 chip customers in China, it is much easier to collect and audit the accounts of foundries than chip companies.

In addition, we have continuously licensed our technologies to foundries for new process nodes and new applications and continuing tape-outs through end customers' adoption. The contract will be breached if the foundry fails to pay the royalties. As a result, all customers' tape- outs in the pipeline cannot go for production. The loss to the foundry will be much bigger than not paying royalties, not to mention the infringement of lawsuits penalty. The risk of embedded NVM is that there is a problem with memory reading after production, the entire chip or even the system will shut down, and the resulting penalty for damage will be much bigger, so customers don't want to risk illegally obtaining IPs.

Synopsys has acquired our previous main competitors, Sidense and  Kilopass, for over five years. In the past, we often heard clients say that they bundle EDA tools to sell together, and the OTP price was very low or even free to get our customers to switch. However, no customers have ever switched because of this, and we have not changed our pricing strategy either. Accurately, more and more customers using Synopsys have switched to our IP. The latest news is that Synopsys raised their price because the previous price-killing strategy was ineffective. PUF is even more fundamentally different. Synopsys uses SRAM PUF, and the performance is incomparable to our NeoPUF IP. Synopsys' security department is composed mainly of many companies acquired through M&A. Their strategy focuses on the security aspect of system integration, which differs from our focus on offering the best root of trust in the world.

The majority of IP companies mainly collect licensing fees but with no or little royalty. Our strategy is to charge less on licensing in the early stage but insist on collecting royalties.

We foresee an increase in foundry penetration rate due to our extensive development in technology platforms across multiple foundries. More than 100 process platforms are under development each year, with an average of 400 new product tape-outs growing to an average of 600 new product tape-outs per year, designing in our OTP, MTP and PUF-related security technologies.

The OTP in mature processes is a very stable cash cow for us due to limited R&D resources. The leading edge and additional royalties from PUF-related security solutions will drive the ASP of future royalties. On the other hand, because of overcapacity, foundries are allocating resources to develop specialty processes to add value and differentiation, such as our MTP-related technology, which witnessed substantial licensing growth this year. The royalty rate for MTP-related technologies is double that of OTP, which will also increase the penetration rate of mature processes and the growth of royalties per wafer.

We've been using our current office for over 15 years, but our employee count has increased by more than 50%, so the existing office space is not enough. We acquired a new office to provide employees with a better working environment and be prepared for expansion in the future.

The growth of our licensing revenue is mainly driven by the strong demand for all of our technologies, which will also drive the strong momentum of future royalties.

Our R&D is still based in Taiwan and will not expand along with foundry expansion overseas. This is because we provide technology and design licensing, which does not require on-site execution in local foundries.

The 4/5/6/7 nanometers in the presentation refer to each process node's licensing and development progress, not the finalized number of designs. For example, N7 NeoFuse/NeoPUF and N6 NeoFuse/NeoPUF represent two process nodes, not tape-out numbers. The actual number of accumulated tape-outs for N7 and N6 exceeds 25. For precise tape-out numbers, please refer to our Management Report instead.

The conversion rate from tape-out to mass production exceeds 95%. We have a high conversion rate because most of our tape-outs come from the mature applications of big companies. Almost all of these tape-outs will successfully move to production, resulting in royalty revenue.

Approximately 30 foundries worldwide have licensed our technologies, including Intel and GF.

Foundry usually begins its development for most leading process with its own foundation IP, typically with its own OTP solution, called eFuse. Most advanced processes in the past have used eFuse for parameter setting, ID, or other functions that require OTP.

For our IPs to be provided to customers, we need to pass all the verifications foundries require, which typically takes 1-2 years. Once our IPs are qualified, it’s usually already too late for the most leading edge customers. For example, our design activities just significantly increased in 6/7nm after our IPs were qualified with customer production records. Most customer applications we engage with now migrated from 12/16nm, and most used eFuse in their previous generations. The reason customers replace eFuse with our IPs is to meet their density or security requirements because eFuse can only write 4K bits at most, while our IPs can accommodate densities a hundred times or higher. Even worse, eFuse can be easily been hacked by reverse engineering.

Due to the increasing demand for security and much higher storage density requirements, customers are constantly requesting our IP solutions in the most leading edge processes.

Moreover, our cooperation with Arm's Confidential Computing Architecture can be adopted by the most leading edge customers. We are working with customers and foundries to accelerate our qualification progress and hope we can catch up in the future.

Many of our existing customers are developing or already in automotive, such as Driver, MCU, CIS/ISP, Networking and PMIC, which bring our IPs into automotive applications.

For example, Dialog is our first design house customer. They started adopting our IPs in 2003; now, almost all their products have our IPs. After being acquired by Renesas last year, their target is to extensively expand into the automotive field, taking all our IPs along with their expansion. Our first NeoFuse customer Realtek, also adopted our IPs in all their automotive solutions. Realtek also start to adopt our PUF-based Root of Trust to upgrade their security function. 

Besides existing customers and applications, we have 7nm ADAS customer already in mass production. We believe the penetration rate in automotive related application have big potential for growth as our IPs provide chip customers with better yield, higher functionality and counterfeit protection and safety for car connection.

The licensing of MTP dropped this year was mainly due to a one-time big license payment from China MRAM fab last year and it will take a few years to commercialize before it can contribute to royalty. In terms of royalties, we have already seen significant growth in MTP due to mass production of applications over the previous years.

The latest sanctions mainly target HPC-related products for AI applications. We currently have no Chinese customers in this area, as mostly our leading-edge customers are US and Japan-based. Also, since we develop our intellectual property rather than licensing US technology, we are not directly affected by the sanctions.The latest sanctions mainly target HPC-related products for AI applications. We currently have no Chinese customers in this area, as mostly our leading-edge customers are US and Japan-based. Also, since we develop our intellectual property rather than licensing US technology, we are not directly affected by the sanctions.

DDI and PMIC are analog circuit designs. Because there are variations in the production process of fabs, to control the output signal accurately and meet the specification, they need our OTP/MTP IP to perform output tuning, function setting, post-test parameter storage and code update.

These are already a standard in DDI and PMIC designs. We expect more analog and mixed mode application to follow.

While TI is not currently our customer, we have many PMIC customers. Still, the main royalty contribution comes from Dialog and non-traditional PMIC companies, mainly from processors or system companies. This type of customer's annual wafer production volume is 700,000 to 800,000 pieces. They have replaced some of the chips of the traditional IDM (like TI). TI's pricing competition will not affect such companies because they are all top-tier customers of foundries with the lowest foundry cost, even when foundry raise wafer price in past years, it did not affect theirs. Their PMIC products are mainly used in-house or bundled sales with processors. Their royalty was affected primarily by end-market demand and inventory adjustments, and each customer's situation differs. The first customer to adjust inventory had already started placing wafer orders. The rest will gradually return to normal production levels next year.

We believe that PMIC's royalties will grow strongly next year. In addition to the lower year-over- year base comparison, new customer gains (i.e. Korean smartphone), penetrating into EV cars, data center , wearable through key customers, as well as ASP enhancement through customers migrating into more leading process node (our US customers' PMIC migrating from 8 inch to 12 inch 55 nm) will all make PMIC royalty growth strongly next year.

The definition of AI is very broad. I think what most people care about now is the large-scale language training models made by NVDA and AMD, both of which have made contact with us in the past. NVDA started reaching out in 2020, and we have been discussing how to implement our OTP and PUF into their security architecture. The reason for not being adopted was that our 4/5 nm did not complete the qualification at that time.

For the key storage of Hardware Root of Trust (HRoT), they currently use eFuse. As I mentioned earlier, eFuse is not safe for key storage. OTP or PUF+OTP must be used to provide keys secure storage.

For key generation of Hardware Root of Trust (HRoT), they currently use the conventional True Random Number Generator (TRNG) without PUF so the entropy and speed of key generation is inferior to what we provide in PUF-based True Random Number Generator (TRNG). In fact, our randomness is about 100 times theirs, they also consume about 100 times the power of ours.

Especially in the future, the length of the key required by post-quantum algorithm will be greatly increased, which will also increase the calculation time. Having high-speed key generation such as ours is very advantageous. We are very confident that with the progress of our 3nm and more production records, we have great opportunities in the future.

In addition to these two major chip suppliers, we also have cloud customers doing in-house AI procesor in China and US this year. Furthermore, if AI, in a broad sense, also covers edge computing, then we already have many customers. Our solution is only a small area and can generate basic security functions in a simple way, which is very competitive in edge computing.

Currently, the applications inside the AI server adopting our IPs with  tape-outs or in production are: SSD controllers, CXL memory controllers, Retimers, PMIC and SPD for DDR 5 DIMM card. The CPU and GPU have not yet adopted our IP, but we have a good chance when we complete 3nm verification, especially for those who adopt ARM solution.

Since the utilization rate of foundries is very low, there are incentives for foundries to develop specialty technologies, especially embedded NVMs, to increase wafer value. With the requirement for high speed, low power and small form factors, replacing external memory with embedded memory is accelerating. Our MTP technology is compatible with the logic process, so the foundry can easily expand the existing logic process for embedded NVM without investing in additional equipment.

With fabs’ low utilization rate, foundries are allocating more resources to speed up technology development. We believe our MTP-related technologies have started to enter a multi-year growth cycle and will have significant royalty growth next year.

Some customers have adopted our IP in 12nm ISPs with small volume production. Since the price of 12nm wafer is 40% higher than that of 22/28nm, if existing 22/28nm customers switch to 12nm, chip size remains the same, then royalty difference will be the increase of wafer pricing, which has nothing to do with how much density is used.

CXL is the protocol to enhance the memory capacity sharing between CPU and other devices, such as GPU. Our CXL Memory eXpander Controller customers adopt our Root of Trust to protect the security of data confidentiality and integrity during data transfer.

RCD and DB currently do not use. But SPD Hub has adopted NeoEE for 100K endurance. So, inside DDR5 DIMM card, there are two chips SPD hub and PMIC with our MTP solution.

If the customer uses eFuse and it blows out accidentally, they will usually increase the eFuse area, however, this will take up too much space and would be very expensive for advanced process chips. In addition, eFuse cannot accommodate circuit design that needs to burn a large current. However, since eFuse is provided by the foundry, if there is a problem, the foundry will be responsible, so eFuse is still dominating in advanced manufacturing processes. Another type of technology is anti-fuse, mainly our NeoFuse and competitor’s solution. However, the IP of competitors has experienced problems in advanced manufacturing processes. At present,  not heard any customer adopt their solution in leading processes. But it also affects customers' confidence and slows down the adoption of this technology. With more production record and successfully moving into 5nm and 3nm, we are confident to replacing eFuse is only a matter of time.

SRAM is mainly embedded in processors (CPU, AP, GPU, etc.) If the density of the OTP for SRAM repairment exceeds 8kbits, eFuse is insufficient, so you will need to switch to AntiFuse (NeoFuse). All processors represent a potential market. As the SRAM density continues to grow, the potential market for adoption will also increase.

Customers use our OTP for multi-chip repair because traditional eFuse is unsuitable for post-packaging modifications. For example, in recent years, ISPs that need to be packaged with DRAM and CIS are driving customers to use our OTP for ISPs. As a result, ISP has contributed to over 10% of our royalties this year.

Furthermore, DRAM manufacturers have also licensed our technology for DRAM repair and after 3D or 2.5D chip packaging with logic chips. We expect more adoptions of our IPs for similar applications in the future.

Over 25 tape-outs from the past have now entered production. We expect a significant growth in royalties beginning from next year.

We do not have any impact since the banned chips don't use our IP yet.

Edge devices all need security protection so that they can securely connect to cloud services. Particularly, with generative AI embedded in edge devices, the AI models and training data must also be protected. Our PUF-based security IPs will have a big market in edge devices.

No, this will not affect us. We are developing our IP in related processes.

Future computing processors will move toward Confidential Computing, which requires high-level security functions. As we have successfully developed PUF-based Root of Trust security IP, which provides very strong security functions for these processors, we have a great opportunity to license these IPs to these Confidential Computing processors. Besides, in order to enhance the computation performance, these processors all need high-density SRAM, our NeoFuse OTP plays an important role for SRAM repair. We expect our IPs to cover a huge market in these processor-related applications.

The licensing of MTP covers five technologies: NeoEE, NeoMTP, NeoFlash, RRAM and MRAM. Over the past few years, MTP's licensing revenue mainly came from foundries. MTP's development and verification period is relatively long, typically exceeding two years. As a result, it takes at least five years before customers even move from tape-out, to production, to royalty contribution. However, since these technologies have already been adopted into mainstream applications, we anticipate accelerated growth in royalty in the future.

Our TSMC 7nm applications are just entering mass production but are independent of the applications currently in production at TSMC. TSMC is actively developing mixed mode-related technologies like RF to increase the foundry utilization rate of 7nm, which will drive more applications to adopt our IPs.

We have AI-related tape-out, which uses our OTP for SRAM repair due to high SRAM density. With the increasing SRAM density in AI and HPC processors, we foresee increasing demand of our OTP for SRAM repair.

This year, 5nm technology will be adopted in self-driving, data center, and AI-related applications. Meanwhile, 3nm technology is undergoing verification at major foundries. In addition to our collaboration with CPU partners, we already have ADAS and processor customers, as well as a US cloud service provider requesting our IP for 3nm. We are confident about the verification process and anticipate customer design-ins next year.